A study of CMOS device latch-up model with transient radiation과도방사선에 의한 CMOS 소자 Latch-up 모델 연구

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Transient radiation is emitted during a nuclear explosion. Transient radiation causes a fatal error in the CMOS circuit as a Upset and Latch-up. In this paper, transient radiation NMOS, PMOS, INVERTER SPICE model was proposed on the basisi of transient radiation effects analysis using TCAD(Technology Computer Aided Design). Photocurrent generated from the MOSFET internal PN junction was expressed to the current source and Latch-up phenomenon in the INVERTER was expressed to parasitic thyristor for the transient radiation SPICE model. For example, the proposed transient radiation SPICE model was applied to CMOS NAND circuit.. SPICE simulated characteristics were similar to the TCAD simulation results. Simulation time was reduced to 120 times compared to TCAD simulation.
Publisher
Korean Institute of Electrical Engineers
Issue Date
2012-03
Language
English
Citation

TRANSACTIONS OF THE KOREAN INSTITUTE OF ELECTRICAL ENGINEERS, v.61, no.3, pp.422 - 426

ISSN
1975-8359
URI
http://hdl.handle.net/10203/104107
Appears in Collection
RIMS Journal Papers
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