DC Field | Value | Language |
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dc.contributor.author | Koo, Bon-Hoon | ko |
dc.contributor.author | Na, Yoo-Sam | ko |
dc.contributor.author | Hong, Song-Cheol | ko |
dc.date.accessioned | 2013-03-12T07:25:17Z | - |
dc.date.available | 2013-03-12T07:25:17Z | - |
dc.date.created | 2012-06-15 | - |
dc.date.created | 2012-06-15 | - |
dc.date.issued | 2012-02 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.60, no.2, pp.340 - 351 | - |
dc.identifier.issn | 0018-9480 | - |
dc.identifier.uri | http://hdl.handle.net/10203/101661 | - |
dc.description.abstract | This paper presents a highly linear differential cascode CMOS power amplifier (PA) with gate bias circuits in Common Source (CS) and Common Gate (CG) amplifiers. The proposed Class-D bias circuit at the gate of a CS amplifier injects a reshaped envelope signal only when the envelope signal is above a certain threshold voltage. This improves the linearity of the PA without significantly degrading the efficiency in a high-power region. In addition, the proposed bias circuit at the gate of a CG amplifier controls the second-order nonlinear components to improve the linearity and to reduce the sideband (IMD or ACLR) asymmetry, simultaneously. A single-stage PA including the bias circuits was fabricated using a 0.18-mu m CMOS process, with an integrated passive device (IPD) transmission line transformer (TLT). With a 3.5 V supply, the measurements show that 26.8 dBm with 43.3% PAE at -37 dBc ACLR (5 MHz offset) and 27.8 dBm with 45.8% PAE at -33 dBc ACLR (5 MHz offset) at 1.85 GHz under 3GPP WCDMA test without digital pre-distortions. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | INTERMODULATION DISTORTION ASYMMETRY | - |
dc.subject | HANDSET APPLICATIONS | - |
dc.subject | TRANSFORMER | - |
dc.subject | IMPROVEMENT | - |
dc.subject | COMPENSATION | - |
dc.subject | INJECTION | - |
dc.subject | SCHEME | - |
dc.title | Integrated Bias Circuits of RF CMOS Cascode Power Amplifier for Linearity Enhancement | - |
dc.type | Article | - |
dc.identifier.wosid | 000302501700014 | - |
dc.identifier.scopusid | 2-s2.0-84857020291 | - |
dc.type.rims | ART | - |
dc.citation.volume | 60 | - |
dc.citation.issue | 2 | - |
dc.citation.beginningpage | 340 | - |
dc.citation.endingpage | 351 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES | - |
dc.identifier.doi | 10.1109/TMTT.2011.2177857 | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Hong, Song-Cheol | - |
dc.contributor.nonIdAuthor | Na, Yoo-Sam | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | ACLR | - |
dc.subject.keywordAuthor | ACLR asymmetry | - |
dc.subject.keywordAuthor | baseband injection | - |
dc.subject.keywordAuthor | baseband mismatch | - |
dc.subject.keywordAuthor | bias circuit | - |
dc.subject.keywordAuthor | bias network | - |
dc.subject.keywordAuthor | Class-AB | - |
dc.subject.keywordAuthor | cascode amplifiers | - |
dc.subject.keywordAuthor | CMOS | - |
dc.subject.keywordAuthor | differential | - |
dc.subject.keywordAuthor | envelope injection | - |
dc.subject.keywordAuthor | IMD | - |
dc.subject.keywordAuthor | IMD asymmetry | - |
dc.subject.keywordAuthor | IPD | - |
dc.subject.keywordAuthor | linear amplifier | - |
dc.subject.keywordAuthor | linearity | - |
dc.subject.keywordAuthor | linearization | - |
dc.subject.keywordAuthor | power amplifier (PA) | - |
dc.subject.keywordAuthor | transmission line transformer (TLT) | - |
dc.subject.keywordAuthor | WCDMA | - |
dc.subject.keywordPlus | INTERMODULATION DISTORTION ASYMMETRY | - |
dc.subject.keywordPlus | HANDSET APPLICATIONS | - |
dc.subject.keywordPlus | TRANSFORMER | - |
dc.subject.keywordPlus | IMPROVEMENT | - |
dc.subject.keywordPlus | COMPENSATION | - |
dc.subject.keywordPlus | INJECTION | - |
dc.subject.keywordPlus | SCHEME | - |
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