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3차원 적층 패키지용 인터커넥션 공정에 관한 연구 = A study on interconnection process of 3D packaginglink 김선락; Kim, Sun-Rak; et al, 한국과학기술원, 2013 |
Development of three-dimensional memory die stack packages using polymer insulated sidewall technique Ko, HS; Kim, JS; Yoon, HG; Jang, SY; Cho, SD; Paik, Kyung-Wook, IEEE TRANSACTIONS ON ADVANCED PACKAGING, v.23, no.2, pp.252 - 256, 2000-05 |
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