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Showing results 1 to 4 of 4

1
DRAM-Latency Optimization Inspired by Relationship between Row-Access Time and Refresh Timing

Shin, Wongyu; Choi, Jungwhan; Jang, Jaemin; Suh, Jinwoong; Moon, Youngsuk; Kwon, Yongkee; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.65, no.10, pp.3027 - 3040, 2016-10

2
High performance memory mode control for HDTV decoders

Park, SI; Yi, YS; Park, In-Cheol, IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, v.49, pp.1348 - 1353, 2003-11

3
Refresh-Aware Write Recovery Memory Controller

Jang, Jaemin; Shin, Wongyu; Choi, Jungwhan; Suh, Jinwoong; Kwon, Yongkee; Kim, Yongju; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.66, no.4, pp.688 - 701, 2017-04

4
Sparse-Insertion Write Cache to Mitigate Write Disturbance Errors in Phase Change Memory

Jang, Jaemin; Shin, Wongyu; Choi, Jungwhan; Kim, Yongju; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.68, no.5, pp.752 - 764, 2019-05

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