Showing results 2 to 8 of 8
Digital patination = 디지털 파티네이션: 제품 애착 형성을 위한 디지털화된 파티나의 이해와 적용link Lee, Moon-Hwan; 이문환; et al, 한국과학기술원, 2016 |
Epitaxial Lift-Off Technology for Large Size III-V-on-Insulator Substrate Lee, Subin; Kim, Seongkwang; Han, Jae-Hoon; Song, Jin Dong; Jun, Dong-Hwan; Kim, Sang-Hyeon, IEEE ELECTRON DEVICE LETTERS, v.40, no.11, pp.1732 - 1735, 2019-11 |
M.Integrator: a maker's tool for integrating kinetic mechanisms and sensors Jeong, Yunwoo; Kim, Han-Jong; Cho, Hyungjun; Nam, Tek-Jin, INTERNATIONAL JOURNAL OF INTERACTIVE DESIGN AND MANUFACTURING - IJIDEM, v.14, no.1, pp.271 - 283, 2020-03 |
Memory-Augmented Convolutional Neural Networks With Triplet Loss for Imbalanced Wafer Defect Pattern Classification Hyun, Yunseung; Kim, Heeyoung, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.33, no.4, pp.622 - 634, 2020-11 |
Performance of MEMS-Based Monopropellant Microthruster With Insulating Effect Huh, Jeongmoo; Park, Ki Sun; Lee, Jeongsub; Kwon, Sejin, JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, v.31, no.4, pp.612 - 624, 2022-08 |
Research on fabrication process & mechanical behavior of CNT/Cu & CNT/Ni nanocomposite = 탄소나노튜브/Cu 및 탄소나노튜브/Ni 나노복합재료의 제조 공정 및 기계적 거동 연구link Lim, Byung Kyu; 임병규; Jeon, Seok Woo; 전석우; et al, 한국과학기술원, 2012 |
Simulation and fabrication of silicon nanowire BioFETs = 실리콘 나노선 구조의 바이오 전자 소자 시뮬레이션 및 공정 실험link Lee, Jae-Hyun; 이재현; et al, 한국정보통신대학교, 2008 |
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