Online scheduling of integrated single-wafer processing tools with temporal constraints

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dc.contributor.authorYoon, HJko
dc.contributor.authorLee, Doo Yongko
dc.date.accessioned2013-03-07T19:49:13Z-
dc.date.available2013-03-07T19:49:13Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2005-08-
dc.identifier.citationIEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.18, pp.390 - 398-
dc.identifier.issn0894-6507-
dc.identifier.urihttp://hdl.handle.net/10203/91136-
dc.description.abstractThis paper addresses the issues of online scheduling for integrated single-wafer processing tools with temporal constraints. The integrated single-wafer processing tool is an integrated processing system consisting of single-wafer processing modules and transfer modules. Certain chemical processes require that the wafer flow satisfies temporal constraints, especially, postprocessing residency constraints. This paper proposes an online scheduling method that guarantees both logical and temporal correctness for the integrated single-wafer processing tools. First, mathematical formulation of the scheduling problem using temporal constraint sets is presented. Then, an online, noncyclic scheduling algorithm with polynomial complexity is developed. The proposed scheduling algorithm consists of two subalgorithms: FEASIBLE_SCHED_SPACE and OPTIMAL_SCHER The former computes the feasible solution space in the continuous time domain, and the latter computes the optimal solution that minimizes the completion time of the last operation of a newly inserted wafer.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectTIME-WINDOW CONSTRAINTS-
dc.subjectCLUSTER TOOLS-
dc.subjectHOIST-
dc.subjectNETWORKS-
dc.titleOnline scheduling of integrated single-wafer processing tools with temporal constraints-
dc.typeArticle-
dc.identifier.wosid000231129400007-
dc.identifier.scopusid2-s2.0-25144432280-
dc.type.rimsART-
dc.citation.volume18-
dc.citation.beginningpage390-
dc.citation.endingpage398-
dc.citation.publicationnameIEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING-
dc.identifier.doi10.1109/TSM.2005.852103-
dc.contributor.localauthorLee, Doo Yong-
dc.contributor.nonIdAuthorYoon, HJ-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorcluster tool-
dc.subject.keywordAuthoronline scheduling-
dc.subject.keywordAuthorpostprocessing residency constraint-
dc.subject.keywordAuthorreal-time scheduling-
dc.subject.keywordAuthorsemiconductor manufacturing-
dc.subject.keywordAuthortemporal constraint-
dc.subject.keywordPlusTIME-WINDOW CONSTRAINTS-
dc.subject.keywordPlusCLUSTER TOOLS-
dc.subject.keywordPlusHOIST-
dc.subject.keywordPlusNETWORKS-
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