1.25-Gb/s regulated cascode CMOS transimpedance amplifier for Gigabit Ethernet applications

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A transimpedance amplifier (TIA) has been realized in a 0.6-mum digital CMOS, technology for Gigabit Ethernet applications. The amplifier exploits the regulated cascode (RGC) configuration as the input stage, thus achieving as large effective input transconductance as that of Si Bipolar or GaAs MESFET. The RGC input configuration isolates the input parasitic capacitance including photodiode capacitance from the bandwidth determination better than common-gate TIA. Test chips were electrically measured on a FR-4 PC board, demonstrating transimpedance gain of 58 dBOmega and -3-dB bandwidth of 950 MHz for 0.5-pF photodiode capacitance. Even with 1-pF photodiode capacitance, the measured bandwidth exhibits only 90-MHz; difference, confirming the mechanism of the RGC configuration. In addition, the noise measurements show average noise current spectral density of 6.3 pA/rootHz and sensitivity of -20-dBm for a bit-error rate of 10(-12). The chip core dissipates 85 mW from a single 5-V supply.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2004-01
Language
English
Article Type
Article
Keywords

OPTICAL RECEIVER; PHOTORECEIVER; 1-GB/S

Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.39, pp.112 - 121

ISSN
0018-9200
DOI
10.1109/JSSC.2003.820884
URI
http://hdl.handle.net/10203/83640
Appears in Collection
EE-Journal Papers(저널논문)
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