THE EFFECT OF INTERNAL PARASITIC CAPACITANCES IN SERIES-CONNECTED MOS STRUCTURE
A simple method is presented to calculate the parasitic capacitance effect in the propagation delay of series-connected MOS (SCM) structures. This method divides SCM circuits into two parts and accurately calculates the contribution of each part to the difference from the delay without parasitic capacitances.
- Publisher
- IEICE-INST ELECTRON INFO COMMUN ENG
- Issue Date
- 1995-01
- Language
- English
- Article Type
- Letter
- Citation
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E78A, no.1, pp.142 - 145
- ISSN
- 0916-8508
- Appears in Collection
- EE-Journal Papers(저널논문)
- Files in This Item
- There are no files associated with this item.
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