A physical-based analytical current model of poly-Si thin-film transistors (TFT's) for circuit simulation is presented. The model includes the barrier potential at grain boundaries, drain induced grain barrier lowering (DIGBL), temperature dependence, and the kink effect. The basic equation in the model has an analytic form for implementation in circuit simulators. The model has simple relationships between model parameters and device or material parameters. In addition to the current model, a capacitance model based on the current model is presented. Comparisons between the model and measured results show excellent agreement over wide ranges of operating voltages and for devices with different channel lengths.