DESIGN OF COMPACT STATIC CMOS CARRY LOOK-AHEAD ADDER USING RECURSIVE OUTPUT PROPERTY

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A high-speed adder scheme based on transistor sharing in multiple output static CMOS complex gates having recursive relations among output expressions (called recursive output property) is introduced. A brief transistor sharing technique for extracting the subfunction from the given Boolean function implemented with a static CMOS complex gate is described, and the technique applied to the design of a 32 bit CLA (carry look-ahead adder). Simulation using HSPICE with 1.5 mum CMOS model parameters for the case of a 32 bit carry look-ahead adder has shown a reduction of the total number of transistors in the 4 bit carry look-ahead circuit from 56 of the conventional scheme down to the 32 of our proposed scheme with a speed improvement of approximately 12.5% for 32 bit addition.
Publisher
IEE-INST ELEC ENG
Issue Date
1993-04
Language
English
Article Type
Article
Keywords

LOGIC

Citation

ELECTRONICS LETTERS, v.29, no.9, pp.794 - 796

ISSN
0013-5194
DOI
10.1049/el:19930531
URI
http://hdl.handle.net/10203/61382
Appears in Collection
EE-Journal Papers(저널논문)
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