DC Field | Value | Language |
---|---|---|
dc.contributor.author | Han, Chul-Hi | ko |
dc.contributor.author | K.Kim | ko |
dc.date.accessioned | 2013-02-25T04:58:21Z | - |
dc.date.available | 2013-02-25T04:58:21Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1991-02 | - |
dc.identifier.citation | IEEE ELECTRON DEVICE LETTERS, v.12, no.2, pp.74 - 76 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | http://hdl.handle.net/10203/60031 | - |
dc.description.abstract | A leakage current model is presented which shows very good agreement with reported experimental results on gated diode structures with today's ULSI dimensions. The leakage current is modeled as the Shockley-Read-Hall (SRH) generation current, enhanced by the Poole-Frenkel (P-F) effect and trap-assisted tunneling. The model shows very good agreement on gate voltage, temperature, and oxide thickness dependence for normal operating voltage range. It is found from the model that the doping range from 2 x 10(18) to 1 x 10(19) cm-3 gives the most significant degradation to the leakage characteristics in trench-type DRAM cells and the drain of MOSFET's. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | JUNCTIONS | - |
dc.subject | FIELD | - |
dc.title | LEAKAGE MECHANISMS IN THE HEAVILY DOPED GATED DIODE STRUCTURES | - |
dc.type | Article | - |
dc.identifier.wosid | A1991EU68900014 | - |
dc.type.rims | ART | - |
dc.citation.volume | 12 | - |
dc.citation.issue | 2 | - |
dc.citation.beginningpage | 74 | - |
dc.citation.endingpage | 76 | - |
dc.citation.publicationname | IEEE ELECTRON DEVICE LETTERS | - |
dc.contributor.localauthor | Han, Chul-Hi | - |
dc.contributor.nonIdAuthor | K.Kim | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordPlus | JUNCTIONS | - |
dc.subject.keywordPlus | FIELD | - |
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