Design and implementation of gigabit CMOS transimpedance amplifier for high-speed optical receiver applications

Abstract

As the industry is growing up, it has led to the necessity of high volume data processing with high speed. With that flow, the exponential growth of the demands of internet, which requires the volume of the data transported on the backbone, has increases. To satisfy the requested capacity and speed, the transmission media has been converged to optical fibers. Even though there have been many research efforts to solve the demands through system approaches such as wave-division multiplexing (WDM), the bottleneck is the electrical chips which form the system. In the electrical chip domain, integration of high-speed analog functions and digital logic on a single chip or the system-on-chip (SoC) is becoming main-stream because it achieves low system power and small size. However, the SoC has intrinsic and fatal problem of substrate coupling noise between high fidelity analog circuits and noisy digital logic through the common silicon substrate. To satisfy all conditions mentioned above, solution for digital noise, as well as high speed, is required. In this thesis, design and implementation of gigabit CMOS transimpedance amplifier (TIA) for high-speed optical receiver application is described. In addition, to the intrinsic and fatal problem of system-on-chip (SoC) induced by substrate coupling noise between high fidelity analog circuits and noisy digital logic through the common silicon substrate, the approach to one-chip solution with digital noise free is proposed, implemented and verified with measurement. A 1.25Gbps 80dBΩ fully differential transimpedance amplifier is implemented using 0.25㎛ CMOS and MCO (Multi-Chip-on-Oxide) process. MCO enables the integration of photodiode, TIA and planar inductors of Q=21.1 for shunt peaking on a oxidized silicon substrate. Its input noise current, inter-channel crosstalk and power dissipation are 0.13μA, ＜-40dB and 27mW, respectively. The chip size of MCO and TIA are 5×5㎟ and 0.13×0.17㎟, respectively.