(A) low power variable length decoder for MPEG-2 based on caching = 캐쉬를 사용한 MPEG-2용 저전력 가변 길이 복호화기

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The increased demand for portable multimedia systems has made power an important factor during design process. Though variable length coding / decoding is widely used technique in digital video systems, previous approaches to reduce power consumption have concentrated on other steps such as the discrete cosine transform. In the case of variable length decoder, it has been designed to achieve high throughput. To minimize the total power consumption of entire systems, low power designs are required for all steps including variable-length decoding. In this thesis, a low power variable length decoding architecture exploiting codeword statistics as well as correlation is presented. This approach uses a small lookup table to reduce number of operations in VLC detector where the most of power is consumed. Power consumption is estimated by PowerMill using 0.35um cell library. The simulation result shows that average 35 percent of power reduction is possible compared to previous table partitioning scheme.
Advisors
Park, In-Cheolresearcher박인철researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2000
Identifier
157472/325007 / 000983410
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2000.2, [ v, 56 p. ]

Keywords

Variable length decoder; Low power; MPEG-2; VLD; 캐쉬; 가변길이복호화기; 저전력; 엠펙2; Caching

URI
http://hdl.handle.net/10203/37313
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=157472&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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