VLIW 프로세서를 위한 부동 소수점 유닛의 설계 = A design of floating-point unit for VLIW processor

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 165
  • Download : 0
Advisors
경종민researcherKyung, Chong-Minresearcher
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
1997
Identifier
114210/325007 / 000953183
Language
kor
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 1997.2, [ vi, 55, 2 p. ]

Keywords

부동 소수점; 분리 수행; Splittable operation; Floating-point

URI
http://hdl.handle.net/10203/36914
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=114210&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0