DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Seok Woo | ko |
dc.contributor.author | Lee, Seung Seob | ko |
dc.date.accessioned | 2008-01-14T08:50:34Z | - |
dc.date.available | 2008-01-14T08:50:34Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2008-02 | - |
dc.identifier.citation | MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, v.14, no.2, pp.205 - 208 | - |
dc.identifier.issn | 0946-7076 | - |
dc.identifier.uri | http://hdl.handle.net/10203/2741 | - |
dc.description.abstract | In the research area known as Lab-on-a-Chip, poly-dimethylsiloane (PDMS) is a popular material whose fabrication method is the replication of patterns by curing on a mold. Shrinkage of PDMS occurs when it is cured; this is a problem related to the alignment between the PDMS layer and the rigid substrate during the wafer-level processing. In this paper, the 2D shrinkage ratio of PDMS is measured experimentally for various curing conditions including the temperature, thickness, and mixing ratio of the curing agent and dilutant. In order to measure this, scale marks were patterned onto a 4 in. wafer and replicated onto a PDMS substrate. When the patterned Si wafer and PDMS substrate were aligned, the difference of each scale mark was observed. A cross-shaped groove was patterned with a scale mark as a align key for the easy alignment of substrates. For a general recipe, the measured shrinkage ratios of PDMS were 1.06, 1.52 and 1.94% for curing temperature of 65, 80 and 100 degrees C, respectively. Considering the shrinkage ratio of PDMS, the design offset applied in a photomask is 1.07, 1.54 and 1.98% for curing temperature of 65, 80 and 100 degrees C, respectively. | - |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | SPRINGER | - |
dc.subject | MICROFLUIDIC SYSTEMS | - |
dc.subject | POLY(DIMETHYLSILOXANE) | - |
dc.subject | MICROMIXER | - |
dc.title | Shrinkage ratio of PDMS and its alignment method for the wafer level process | - |
dc.type | Article | - |
dc.identifier.wosid | 000249972100009 | - |
dc.identifier.scopusid | 2-s2.0-35148865098 | - |
dc.type.rims | ART | - |
dc.citation.volume | 14 | - |
dc.citation.issue | 2 | - |
dc.citation.beginningpage | 205 | - |
dc.citation.endingpage | 208 | - |
dc.citation.publicationname | MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS | - |
dc.identifier.doi | 10.1007/s00542-007-0417-y | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Lee, Seung Seob | - |
dc.contributor.nonIdAuthor | Lee, Seok Woo | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordPlus | MICROFLUIDIC SYSTEMS | - |
dc.subject.keywordPlus | POLY(DIMETHYLSILOXANE) | - |
dc.subject.keywordPlus | MICROMIXER | - |
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