An increase in the number of the through-silicon vies (TSVs) per unit area causes the electrical channel in neighboring semiconductor devices to be closer to the depletion region induced by the electric-field (E-field) around the TSV. A keep-out zone (KOZ) is required to ensure the proper operation of three-dimensional integrated circuits (3-D ICs) using TSVs given these negative effects. The proposed method with which to determine the KOZ for 3-D ICs includes procedures for extracting the charges produced during the TSV formation process and for calculating the depletion region from a nonlinear metal-oxide-semiconductor (MOS) capacitance model. The results of a comparison of the proposed method with a previous method show that the charge carriers in the depletion region and charge-type imperfections of in TSV must be considered for an accurate KOZ.