Highly stacked 3D organic integrated circuits with via-hole-less multilevel metal interconnects

Cited 48 time in webofscience Cited 22 time in scopus
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dc.contributor.authorYoo, Hocheonko
dc.contributor.authorPark, Hongkeunko
dc.contributor.authorYoo, Seunghyunko
dc.contributor.authorOn, Sungminko
dc.contributor.authorSeong, Hyejeongko
dc.contributor.authorIm, Sung Gapko
dc.contributor.authorKim, Jae-Joonko
dc.date.accessioned2019-06-19T01:10:04Z-
dc.date.available2019-06-19T01:10:04Z-
dc.date.created2019-06-18-
dc.date.created2019-06-18-
dc.date.created2019-06-18-
dc.date.created2019-06-18-
dc.date.issued2019-06-
dc.identifier.citationNATURE COMMUNICATIONS, v.10, no.1, pp.2424-
dc.identifier.issn2041-1723-
dc.identifier.urihttp://hdl.handle.net/10203/262727-
dc.description.abstractMultilevel metal interconnects are crucial for the development of large-scale organic integrated circuits. In particular, three-dimensional integrated circuits require a large number of vertical interconnects between layers. Here, we present a novel multilevel metal interconnect scheme that involves solvent-free patterning of insulator layers to form an interconnecting area that ensures a reliable electrical connection between two metals in different layers. Using a highly reliable interconnect method, the highest stacked organic transistors to date, a three-dimensional organic integrated circuits consisting of 5 transistors and 20 metal layers, is successfully fabricated in a solvent-free manner. All transistors exhibit outstanding device characteristics, including a high on/off current ratio of similar to 10(7), no hysteresis behavior, and excellent device-to-device uniformity. We also demonstrate two vertically-stacked complementary inverter circuits that use transistors on 4 different floors. All circuits show superb inverter characteristics with a 100% output voltage swing and gain up to 35 V per V.-
dc.languageEnglish-
dc.publisherNATURE PUBLISHING GROUP-
dc.titleHighly stacked 3D organic integrated circuits with via-hole-less multilevel metal interconnects-
dc.typeArticle-
dc.identifier.wosid000469909800008-
dc.identifier.scopusid2-s2.0-85066616567-
dc.type.rimsART-
dc.citation.volume10-
dc.citation.issue1-
dc.citation.beginningpage2424-
dc.citation.publicationnameNATURE COMMUNICATIONS-
dc.identifier.doi10.1038/s41467-019-10412-9-
dc.contributor.localauthorIm, Sung Gap-
dc.contributor.nonIdAuthorYoo, Hocheon-
dc.contributor.nonIdAuthorYoo, Seunghyun-
dc.contributor.nonIdAuthorOn, Sungmin-
dc.contributor.nonIdAuthorSeong, Hyejeong-
dc.contributor.nonIdAuthorKim, Jae-Joon-
dc.description.isOpenAccessY-
dc.type.journalArticleArticle-
dc.subject.keywordPlusFIELD-EFFECT TRANSISTORS-
dc.subject.keywordPlusCHEMICAL-VAPOR-DEPOSITION-
dc.subject.keywordPlusCOMPLEMENTARY INVERTERS-
dc.subject.keywordPlusTHIN-FILMS-
dc.subject.keywordPlusPOLYMER-
dc.subject.keywordPlusSEMICONDUCTOR-
dc.subject.keywordPlusPERFORMANCE-
dc.subject.keywordPlusSTABILITY-
dc.subject.keywordPlusVOLTAGE-
dc.subject.keywordPlusDNTT-
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