Improved Hard-Reliability Based Majority-Logic Decoding for Non-Binary LDPC Codes

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This letter proposes two methods to improve the iterative hard-reliability based majority-logic decoding algorithm for non-binary low-density parity-check (NB-LDPC) codes. The first method improves the error-correcting performance by modifying the initialization process, which is based on the fact that Gray coded modulation is used in general. In addition, a storage reduction method is proposed to make the proposed decoding hardware-friendly, which reduces the memory size considerably while sustaining the error-correcting performance achieved by the modified initialization. For an NB-LDPC code over Galois field of 32 elements, the memory size is reduced by about 75% compared with that of the conventional decoding algorithm.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2017-02
Language
English
Article Type
Article
Keywords

PARITY-CHECK CODES; ALGORITHMS

Citation

IEEE COMMUNICATIONS LETTERS, v.21, no.2, pp.230 - 233

ISSN
1089-7798
DOI
10.1109/LCOMM.2016.2623783
URI
http://hdl.handle.net/10203/223326
Appears in Collection
EE-Journal Papers(저널논문)
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