A 25-nm MOSFET with an Electrically Induced Source/Drain

Abstract

A new 25-nm MOSFET structure, which has n(+) polysilicon floating gate spacers, is proposed. An inversion layer is induced below floating gate spacers and acts as an extended source/drain region. With indium halo implantation, short-channel effects are controlled by the high doping concentration near the source/drain junction depth, and channel doping concentration becomes low since indium has such a low diffusivity that an extreme retrograde doping profile can be obtained. Due to the low channel doping concentration, several characteristics, like the carrier mobility, the resistance of the extended source/drain region. the junction leakage. the drain current characteristics, and the threshold voltage fluctuation, are improved. The short-channel threshold voltage roll-off and the threshold voltage fluctuation due to a random dopant distribution are examined. The results front a 2-D device simulation show that excellent I-V characteristics are obtained. The subthreshold slope is 80 mV/dec and drain induced barrier lowering is 70 mV/V. The ON/OFF current ratio exceeds 10(6).