Processor-based turbo interleaver for multiple third-generation wireless standards

A software, turbo interleaver running. on,. a SIMD processor is presented for a turbo decoder supporting multiple 3G 3G wireless standards. To hide the timing overhead of interleaver changing, the interleaver generation is split into two parts, preprocessing and incremental on-the-fly generation. Applying the proposed approach, we implemented a W-CDMA and cdma2000 interleaver that generates one interleaved. address per cycle and occupies 10% area of the ROM implementation.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2003-05
Language
ENG
Citation

IEEE COMMUNICATIONS LETTERS, v.7, pp.210 - 212

ISSN
1089-7798
URI
http://hdl.handle.net/10203/1006
Appears in Collection
EE-Journal Papers(저널논문)
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