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Browse by Subject silicon interposer

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Showing results 1 to 12 of 12

1	A Novel Interposer Channel Structure with Vertical Tabbed Vias to Reduce Far-End Crosstalk for Next-Generation High-Bandwidth Memory Kim, Hyunwoong; Lee, Seonghi; Song, Kyunghwan; Shin, Yujun; Park, Dongyrul; Park, Jongcheol; Cho, Jaeyong; et al, MICROMACHINES, v.13, no.7, 2022-07
2	Bump-less high-speed through silicon Via (TSV) channel for terabyte/s bandwidth 2.5D/3D IC = 테라바이트 대역폭 2.5차원/3차원 집적회로를 위한 범프 없는 고속 관통 실리콘 비아 채널 link Lee, Hyunsuk; 이현석; et al, 한국과학기술원, 2015
3	Channel Characteristic-Based Deep Neural Network Models for Accurate Eye Diagram Estimation in High Bandwidth Memory (HBM) Silicon Interposer Lho, Daehwan; Park, Hyunwook; Park, Shinyoung; Kim, Subin; Kang, Hyungmin; Sim, Boogyo; Kim, Seongguk; et al, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.64, no.1, pp.196 - 208, 2022-02
4	Deep Reinforcement Learning-Based Optimal Decoupling Capacitor Design Method for Silicon Interposer-Based 2.5-D/3-D ICs Park, Hyunwook; Kim, Seongguk; Kim, Youngwoo; Kim, Joungho; Park, Junyong; Kim, Subin; Cho, Kyungjun; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.10, no.3, pp.467 - 478, 2020-03
5	Design of an On-Silicon-Interposer Passive Equalizer for Next Generation High Bandwidth Memory With Data Rate Up To 8 Gb/s Jeon, Yeseul; Kim, Heegon; Kim, Joungho; Je, Minkyu, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.65, no.7, pp.2293 - 2303, 2018-07
6	Fast and Accurate Power Distribution Network Modeling of a Silicon Interposer for 2.5-D/3-D ICs With Multiarray TSVs Cho, Kyungjun; Kim, Youngwoo; Kim, Subin; Park, Hyunwook; Park, Junyong; Lee, Seongsoo; Shim, Daeyong; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.9, no.9, pp.1835 - 1846, 2019-09
7	Modeling and analysis of noise coupling and RF sensitivity in through-silicon-via (TSV) silicon interposer = 실리콘 관통 비아 실리콘 인터포져에서의 노이즈 커플링 모델링과 RF감도 해석 link Yoon, Ki-Hyun; 윤기현; et al, 한국과학기술원, 2010
8	Signal Integrity and Computing Performance Analysis of a Processing-In-Memory of High Bandwidth Memory (PIM-HBM) Scheme Kim, Seongguk; Kim, Subin; Cho, Kyungjun; Shin, Taein; Park, Hyunwook; Lho, Daehwan; Park, Shinyoung; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.11, no.11, pp.1955 - 1970, 2021-11
9	Signal Integrity Design and Analysis of Differential High-Speed Serial Links in Silicon Interposer With Through-Silicon Via Cho, Kyungjun; Kim, Youngwoo; Lee, Hyunsuk; Song, Jinwook; Park, Junyong; Lee, Seongsoo; Kim, Subin; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.9, no.1, pp.107 - 121, 2019-01
10	Signal Integrity Design and Analysis of Silicon Interposer for GPU-Memory Channels in High-Bandwidth Memory Interface Cho, Kyungjun; Kim, Youngwoo; Lee, Hyunsuk; Kim, Heegon; Choi, Sumin; Song, Jinwook; Kim, Subin; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.8, no.9, pp.1658 - 1671, 2018-09
11	Thermal and Signal Integrity Co-Design and Verification of Embedded Cooling Structure With Thermal Transmission Line for High Bandwidth Memory Module Son, Keeyoung; Kim, Seongguk; Park, Hyunwook; Shin, Taein; Kim, Keunwoo; Kim, Minsu; Sim, Boogyo; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.12, no.9, pp.1542 - 1556, 2022-09
12	열응력에 의한 실리콘 인터포저 위 금속 패드의 박락 현상 김준모; 김보연; 정청하; 김구성; 김택수, 마이크로전자 및 패키징학회지, v.29, no.3, pp.25 - 29, 2022-09

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