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Choi, Jaehyouk (최재혁)
부교수, School of Electrical Engineering(전기및전자공학부)

http://icsl.kaist.ac.kr

Research Area
Analog ICs, RFICs, Mixed Signal ICs
Co-researchers
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    NO Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date)
    1
    A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator

    Yoo, Seyeon; Choi, Seojin; Lee, Yongsun; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.1, pp.298 - 309, 2021-01

    2
    Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC)

    Blaauw, David; Lee, Hoi; Keane, John P.; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.55, no.12, pp.3127 - 3130, 2020-12

    3
    A Fully Integrated Compact Outphasing CMOS Power Amplifier Using a Parallel-Combining Transformer with a Tuning Inductor Method

    Choi, Se-Eun; Ahn, Hyunjin; Hur, Joonhoi; et al, ELECTRONICS, v.9, no.2, 2020-02

    4
    A Fast-Transient and High-Accuracy, Adaptive-Sampling Digital LDO Using a Single VCO-Based Edge-Racing Time Quantizer

    Lee, Jeonghyun; Bang, Jooeun; Lim, Younghyun; et al, IEEE Solid-State Circuits Letters, v.2, no.12, pp.305 - 308, 2019-12

    5
    An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators

    Kim, Juyeop; Lim, Younghyun; Yoon, Heein; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.12, pp.3466 - 3477, 2019-12

    6
    A 320-fs RMS Jitter and-75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC

    Seong, Taeho; Lee, Yongsun; Yoo, Seyeon; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.9, pp.2501 - 2512, 2019-09

    7
    A 0.1-1.5-GHz Wide Harmonic-Locking-Free Delay-Locked Loop Using an Exponential DAC

    Park, Suneui; Kim, Juyeop; Hwang, Chanwoong; et al, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.29, no.8, pp.548 - 550, 2019-08

    8
    A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration

    Yoon, Heein; Park, Suneui; Choi, Jaehyoukresearcher, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.6, pp.1564 - 1574, 2019-06

    9
    An Ultra-Low-Jitter 22.8-GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114

    Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS , v.54, no.4, pp.927 - 936, 2019-04

    10
    An External Capacitorless Low-Dropout Regulator With High PSR at All Frequencies From 10 kHz to 1 GHz Using an Adaptive Supply-Ripple Cancellation Technique

    Lim, Younghyun; Lee, Jeonghyun; Park, Suneui; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.9, pp.2675 - 2685, 2018-09

    11
    A 65-nm CMOS 2 x 2 MIMO Multi-Band LTE RF Transceiver for Small Cell Base Stations

    Lim, Kyoohyun; Lee, Sanghoon; Lee, Yongha; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.7, pp.1960 - 1976, 2018-07

    12
    A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique

    Lee, Yongsun; Seong, Taeho; Yoo, Seyeon; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.4, pp.1192 - 1202, 2018-04

    13
    A Theoretically Sound Approach to Analog Circuit Sizing

    Lim, Eunji; Choi, Jaehyoukresearcher; Kim, Youngmin, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.18, no.2, pp.200 - 210, 2018-04

    14
    Linearly frequency-tunable and low-phase noise ring VCO using varactors with optimally-spaced bias voltages

    Lee, J.; Choi, S.; Cho, Y.; et al, ELECTRONICS LETTERS, v.54, no.6, pp.342 - 343, 2018-03

    15
    A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers

    Yoo, Seyeon; Choi, Seojin; Kim, Juyeop; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.2, pp.375 - 388, 2018-02

    16
    An External Capacitor-Less Ultralow-Dropout Regulator Using a Loop-Gain Stabilizing Technique for High Power-Supply Rejection Over a Wide Range of Load Current

    Lim, Younghyun; Lee, Jeonghyun; Lee, Yongsun; et al, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.25, no.11, pp.3006 - 3018, 2017-11

    17
    A Fully Integrated Dual-Mode CMOS Power Amplifier With an Autotransformer-Based Parallel Combining Transformer

    Ahn, Hyunjin; Baek, Seungjun; Ilku Nam; et al, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.27, no.9, pp.833 - 835, 2017-09

    18
    Self-sustaining water-motion sensor platform for continuous monitoring of frequency and amplitude dynamics

    Shin, Dongjoon; Seong, Taeho; Choi, Jaehyoukresearcher; et al, NANO ENERGY, v.35, pp.179 - 188, 2017-05

    19
    High-resolution electrohydrodynamic inkjet printing of stretchable metal oxide semiconductor transistors with high performance

    Kim, S. -Y.; Kim, K.; Hwang, Y. H.; et al, NANOSCALE, v.8, no.39, pp.17113 - 17121, 2016-09

    20
    A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier With a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector

    Choi, Seojin; Yoo, Seyeon; Lim, Younghyun; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.51, no.8, pp.1878 - 1889, 2016-08
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