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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

Tiled interleaving for multi-level 2-D discrete wavelet transform

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dc.contributor.authorKim, J.-W.ko
dc.contributor.authorSong, J.ko
dc.contributor.authorLee, S.ko
dc.contributor.authorPark, In-Cheolko
dc.date.accessioned2007-08-09T05:39:15Z-
dc.date.available2007-08-09T05:39:15Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2007-05-27-
dc.identifier.citation2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007, pp.3984 - 3987-
dc.identifier.issn0271-4310-
dc.identifier.urihttp://hdl.handle.net/10203/996-
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-
dc.titleTiled interleaving for multi-level 2-D discrete wavelet transform-
dc.typeConference-
dc.identifier.wosid000251608405083-
dc.identifier.scopusid2-s2.0-34548832517-
dc.type.rimsCONF-
dc.citation.beginningpage3984-
dc.citation.endingpage3987-
dc.citation.publicationname2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007-
dc.identifier.conferencecountryUS-
dc.identifier.conferencelocationNew Orleans, LA-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorPark, In-Cheol-
dc.contributor.nonIdAuthorKim, J.-W.-
dc.contributor.nonIdAuthorSong, J.-
dc.contributor.nonIdAuthorLee, S.-
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