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1
Fabrication of 50-nm gate SOI n-MOSFETs using novel plasma-doping technique

Cho, WJ; Ahn, CG; Im, KJ; Yang, JH; Oh, Jihun; Baek, IB; Lee, S, IEEE ELECTRON DEVICE LETTERS, v.25, no.6, pp.366 - 368, 2004-06

2
Ultra shallow and abrupt n(+)-p junction formations on silicon-on-insulator by solid phase diffusion of arsenic from spin-on-dopant for sub 50 nm Si metal-oxide-semiconductor devices

Oh, Jihun; Im, K; Ahn, CG; Yang, JH; Cho, WJ; Lee, S; Park, K, MATERIALS SCIENCE AND ENGINEERING B-SOLID STATE MATERIALS FOR ADVANCED TECHNOLOGY, v.110, no.2, pp.185 - 189, 2004-07

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