DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Jungsoo | ko |
dc.contributor.author | Oh, Seungyong | ko |
dc.contributor.author | Yoo, Sungjoo | ko |
dc.contributor.author | Kyung, Chong-Min | ko |
dc.date.accessioned | 2013-03-11T12:09:40Z | - |
dc.date.available | 2013-03-11T12:09:40Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2009-04 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.28, pp.568 - 581 | - |
dc.identifier.issn | 0278-0070 | - |
dc.identifier.uri | http://hdl.handle.net/10203/99280 | - |
dc.description.abstract | Dynamic voltage and frequency scaling (DVFS) for a parallel software program is crucial for lowering the ever-increasing power consumption of multiprocessor systems-on-chips (SoCs). In this paper, we propose an analytical DVFS method that judiciously exploits slack by considering the varying parallelism over each path in a task graph. The proposed method overcomes the conventional pessimistic assumption on the remaining workload, i.e., worst-case execution cycle. It yields minimum average energy consumption by utilizing the runtime distribution of a software program while satisfying the deadline constraints. The proposed method tackles leakage power consumption as well as dynamic power consumption by combined V(dd)/V(bb) scaling. Compared to conventional method [15], experimental results show that the proposed method provides up to 49.20% energy reduction for a set of synthetic task graphs and yields 23.93% and 27.15% energy reductions for two multimedia applications, namely, the H.264 encoder and decoder, respectively. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | SYSTEMS | - |
dc.title | An Analytical Dynamic Scaling of Supply Voltage and Body Bias Based on Parallelism-Aware Workload and Runtime Distribution | - |
dc.type | Article | - |
dc.identifier.wosid | 000264629400009 | - |
dc.identifier.scopusid | 2-s2.0-77955217096 | - |
dc.type.rims | ART | - |
dc.citation.volume | 28 | - |
dc.citation.beginningpage | 568 | - |
dc.citation.endingpage | 581 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | - |
dc.identifier.doi | 10.1109/TCAD.2009.2013993 | - |
dc.contributor.localauthor | Kyung, Chong-Min | - |
dc.contributor.nonIdAuthor | Oh, Seungyong | - |
dc.contributor.nonIdAuthor | Yoo, Sungjoo | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Dynamic voltage and frequency scaling (DVFS) | - |
dc.subject.keywordAuthor | energy optimization | - |
dc.subject.keywordAuthor | multiprocessor | - |
dc.subject.keywordAuthor | parallelism | - |
dc.subject.keywordAuthor | runtime distribution | - |
dc.subject.keywordPlus | SYSTEMS | - |
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