A 5.8-GHz High-Frequency Resolution Digitally Controlled Oscillator Using the Difference Between Inversion and Accumulation Mode Capacitance of pMOS Varactors

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dc.contributor.authorYoo, Sang-Sunko
dc.contributor.authorChoi, Yong-Changko
dc.contributor.authorSong, Hong-Jooko
dc.contributor.authorPark, Seung-Chanko
dc.contributor.authorPark, Jeong-Hoko
dc.contributor.authorYoo, Hyung-Jounko
dc.date.accessioned2013-03-09T21:28:20Z-
dc.date.available2013-03-09T21:28:20Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2011-02-
dc.identifier.citationIEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.59, no.2, pp.375 - 382-
dc.identifier.issn0018-9480-
dc.identifier.urihttp://hdl.handle.net/10203/97504-
dc.description.abstractThis paper proposes an oppositely coupled varactor pair and reports the measured results for applying to a test digitally controlled oscillator (DCO). The pair exploits the differences between the accumulation region capacitance and inversion region capacitance of pMOS varactors. The novel varactor pairs provide much smaller switchable capacitances than those of other approaches, and hence, the test DCO for verifying the property of the pair achieves the high-frequency resolution. The pairs and test DCO are implemented in a 0.18-mu m CMOS process. The switchable discrete capacitance of 32 aF is obtained by using the novel varactor pairs, and the test DCO has a frequency resolution of about 110 kHz at 5.8 GHz. Furthermore, Delta C of 4-aF and 14-kHz frequency resolution can be obtained through the dithering processes. The test DCO achieves a low phase noise of -117.6 dBc/Hz at 1-MHz offset from 5.8 GHz.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectCMOS-
dc.subjectVCOS-
dc.titleA 5.8-GHz High-Frequency Resolution Digitally Controlled Oscillator Using the Difference Between Inversion and Accumulation Mode Capacitance of pMOS Varactors-
dc.typeArticle-
dc.identifier.wosid000287415700018-
dc.identifier.scopusid2-s2.0-79951852819-
dc.type.rimsART-
dc.citation.volume59-
dc.citation.issue2-
dc.citation.beginningpage375-
dc.citation.endingpage382-
dc.citation.publicationnameIEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES-
dc.identifier.doi10.1109/TMTT.2010.2095426-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorYoo, Hyung-Joun-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorAll-digital phase-locked loop (ADPLL)-
dc.subject.keywordAuthordigitally controlled oscillator (DCO)-
dc.subject.keywordAuthordigital RF-
dc.subject.keywordAuthorphase-locked loop (PLL)-
dc.subject.keywordAuthorswitching circuits-
dc.subject.keywordAuthorvaractors-
dc.subject.keywordAuthorvoltage-controlled oscillator (VCO)-
dc.subject.keywordPlusCMOS-
dc.subject.keywordPlusVCOS-
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