DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, Sang-Hyun | ko |
dc.contributor.author | Lee, Chang-Kyo | ko |
dc.contributor.author | Kwon, Jong-Kee | ko |
dc.contributor.author | Ryu, Seung-Tak | ko |
dc.date.accessioned | 2013-03-09T01:31:07Z | - |
dc.date.available | 2013-03-09T01:31:07Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2011-08 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.46, pp.1881 - 1892 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/94984 | - |
dc.description.abstract | A speed-enhanced 10-b asynchronous SAR ADC with multistep addition-only digital error correction (ADEC) is presented with a straightforward DAC switching algorithm. The capacitor DAC is virtually divided into three sub-DACs for ADEC with negligible hardware overhead. The redundant decision cycles between stages reconfigure the capacitor connection of the DAC. These redundancies guarantee 10-b linearity under 4-b-accurate DAC settling in the MSB decision and the optimally designed ADC enhances the conversion speed by 37%. A prototype ADC was implemented in a CMOS 0.13-mu m technology. The chip consumes 550 W and achieves a 50.6-dB SNDR at 40 MS/s under a 1.2-V supply. The figure-of-merit (FOM) is 50 fJ/conversion-step. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A 550-mu W 10-b 40-MS/s SAR ADC With Multistep Addition-Only Digital Error Correction | - |
dc.type | Article | - |
dc.identifier.wosid | 000293706300011 | - |
dc.identifier.scopusid | 2-s2.0-79960847584 | - |
dc.type.rims | ART | - |
dc.citation.volume | 46 | - |
dc.citation.beginningpage | 1881 | - |
dc.citation.endingpage | 1892 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.contributor.localauthor | Ryu, Seung-Tak | - |
dc.contributor.nonIdAuthor | Cho, Sang-Hyun | - |
dc.contributor.nonIdAuthor | Kwon, Jong-Kee | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Addition-only digital error correction (ADEC) | - |
dc.subject.keywordAuthor | asynchronous | - |
dc.subject.keywordAuthor | digital error correction | - |
dc.subject.keywordAuthor | multistep binary error correction | - |
dc.subject.keywordAuthor | SAR ADC | - |
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