Parasitic BJT Read Method for High-Performance Capacitorless 1T-DRAM Mode in Unified RAM

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dc.contributor.authorHan, Jin-Wooko
dc.contributor.authorMoon, Dong-Ilko
dc.contributor.authorKim, Dong-Hko
dc.contributor.authorChoi, Yang-Kyuko
dc.date.accessioned2013-03-08T17:57:09Z-
dc.date.available2013-03-08T17:57:09Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2009-10-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.30, no.10, pp.1108 - 1110-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/93822-
dc.description.abstractA high-performance unified RAM without soft programming is demonstrated on a fully depleted FinFET structure. An oxide/nitride/oxide gate dielectric is integrated in a floating-body FinFET, thereby providing the versatile functions of nonvolatile Flash memory and high-speed capacitorless 1T-DRAM. A new read method involving the utilization of a parasitic bipolar junction transistor is employed for the capacitorless 1T-DRAM mode. This manner provides nondestructive reading and a high sensing current window (Delta I(S) > 45 mu A). As the nitride traps are filled with holes before activating the capacitorless 1T-DRAM mode, an undesirable contribution of hole trapping on a threshold voltage shift, i.e., soft programming, is inhibited without sacrificing the sensing current window.-
dc.languageEnglish-
dc.publisherIEEE-Inst Electrical Electronics Engineers Inc-
dc.subjectSINGLE-TRANSISTOR LATCH-
dc.subjectSOI MOSFETS-
dc.subjectURAM-
dc.titleParasitic BJT Read Method for High-Performance Capacitorless 1T-DRAM Mode in Unified RAM-
dc.typeArticle-
dc.identifier.wosid000270227600032-
dc.identifier.scopusid2-s2.0-72049105065-
dc.type.rimsART-
dc.citation.volume30-
dc.citation.issue10-
dc.citation.beginningpage1108-
dc.citation.endingpage1110-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2009.2029353-
dc.contributor.localauthorChoi, Yang-Kyu-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorBipolar junction transistor (BJT)-
dc.subject.keywordAuthorcapacitorless 1T-DRAM-
dc.subject.keywordAuthorFinFET-
dc.subject.keywordAuthornonvolatile memory (NVM)-
dc.subject.keywordAuthorsingle transistor latch-
dc.subject.keywordAuthorsoft programming-
dc.subject.keywordAuthorunified RAM (URAM)-
dc.subject.keywordPlusSINGLE-TRANSISTOR LATCH-
dc.subject.keywordPlusSOI MOSFETS-
dc.subject.keywordPlusURAM-
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