VERIFICATION OF PLC PROGRAMS WRITTEN IN FBD WITH VIS

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Verification of programmable logic controller (PLC) programs written in IEC 61131-3 function block diagram (FBD) is essential in the transition from the use of traditional relay-based analog systems to PLC-based digital systems. This paper describes effective use of the well-known verification tool VIS for automatic verification of behavioral equivalences between successive FBD revisions. We formally defined FBD semantics as a state-transition system, developed semantic-preserving translation rules from FBD to Verilog programs, implemented a software tool to support the process, and conducted a case study on a subset of FBDs for APR-1400 reactor protection system design.
Publisher
KOREAN NUCLEAR SOC
Issue Date
2009-02
Language
English
Article Type
Article
Keywords

SPECIFICATION; SYSTEMS; DESIGN

Citation

NUCLEAR ENGINEERING AND TECHNOLOGY, v.41, no.1, pp.79 - 90

ISSN
1738-5733
URI
http://hdl.handle.net/10203/93568
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