In this paper, we design and implement a multi-protocol 13.56 MHz reader in software. In order to satisfy the timing constraint, three level optimizations called compile level, syntax level, and architectural level optimizations are applied. The execution time of optimized code is reduced by 85%, so that it satisfies timing requirement of a 60 MHz speed EISC processor. In addition, the binary code size is minimized to 211 KBytes which can be loaded on a 256 KB size memory.