Simulation of capacitor discharge stud welding process and void formation

Abstract

Dynamic behaviour and void formation of the capacitor discharge ( CD) stud welding process are investigated through simulation and experiments. Mechanical and electrical models are coupled to predict the current and voltage waveform of the stud welding, and the calculated results show good agreement with the experiment results. The mechanism of void formation and the void trapping condition are explained using the void flow model. While the results of the void flow model show that removal of the void is almost impossible, partial improvement in void reduction is achieved by adjusting the short circuit current between 1200 and 1700 A.