Issues on the interface synthesis between intellectual properties operating at different clock frequencies

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In SoC (system-on-a-chip) design, interfacing among IP (Intellectual Property) blocks is one of the most important issues. Since most IP's are provided by different vendors, they generally have different interface schemes and different operating frequencies. In this paper, we propose a new interface synthesis method with two features: 1) generation of the interface between IP's with different operating frequencies, and 2) minimization of the hardware resource required for the interface. We have demonstrated the proposed algorithm through its application to an MP3 decoder design example, where the IIS (Inter-IC Sound)-to-PCI (Peripheral Component Interconnect) protocol converter was successfully implemented using the proposed method.
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Issue Date
2002
Language
Japanese
Article Type
Article
Citation

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E85A, no.8, pp.1937 - 1945

ISSN
0916-8508
URI
http://hdl.handle.net/10203/83864
Appears in Collection
EE-Journal Papers(저널논문)
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