High Performance RF Passive Integration on a Si Smart Substrate for Wireless Applications

Abstract

To achieve cost and size reductions, we developed a low cost manufacturing technology for RF substrates and a high performance passive process technology for RF integrated passive devices (IPDs). The fabricated substrate is a conventional 6" Si wafer with a 25 mum thick SiO(2) surface. This substrate showed a very good insertion loss of 0.03 dB/mm at 4 GHz, including the conductive metal loss, with a 50 Omega coplanar transmission line (W=50 mum, G-20 mum). Using benzo cyclo butene (BCB) interlayers and a 10 mum Cu plating process, we made high Q rectangular and circular spiral inductors on Si that had record maximum quality factors of more than 100. The fabricated inductor library showed a maximum quality factor range of 30-120, depending on geometrical parameters and inductance values of 0.35-35 nH. We also fabricated small RIF IPDs on a thick oxide Si substrate for use in handheld phone applications, such as antenna switch modules or front end modules, and high-speed wireless LAN applications. The chip sizes of the wafer-level-packaged RIF IPDs and wire-bondable RF IPDs were 1.0-1.5 min(2) and 0.8-1.0 mm(2), respectively. They showed very good insertion loss and RF performances. These substrate and passive process technologies will be widely utilized in hand-held RF modules and systems requiring low cost solutions and strict volumetric efficiencies.