13GHz 4.67dB NF CMOS low-noise amplifier

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dc.contributor.authorGil, JoonHoko
dc.contributor.authorHan, kwangseokko
dc.contributor.authorShin, Hyung-Cheolko
dc.date.accessioned2013-03-03T10:10:40Z-
dc.date.available2013-03-03T10:10:40Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2003-07-
dc.identifier.citationELECTRONICS LETTERS, v.39, no.14, pp.1056 - 1058-
dc.identifier.issn0013-5194-
dc.identifier.urihttp://hdl.handle.net/10203/78325-
dc.description.abstractThe design and measured results of a fully-integrated 13 GHz CMOS low-noise amplifier (LNA) are presented. Effects of substrate resistances on LNA performance are discussed. The LNA has 4.67 dB noise figure and +8.5 dBm of input-referred third-order intercept point (IIP3) with a power consumption of 9.72 mW.-
dc.languageEnglish-
dc.publisherInst Engineering Technology-Iet-
dc.subjectRF-ICS-
dc.subjectOPTIMIZATION-
dc.subjectINDUCTORS-
dc.title13GHz 4.67dB NF CMOS low-noise amplifier-
dc.typeArticle-
dc.identifier.wosid000184273400020-
dc.identifier.scopusid2-s2.0-0042346241-
dc.type.rimsART-
dc.citation.volume39-
dc.citation.issue14-
dc.citation.beginningpage1056-
dc.citation.endingpage1058-
dc.citation.publicationnameELECTRONICS LETTERS-
dc.identifier.doi10.1049/el:20030687-
dc.contributor.localauthorShin, Hyung-Cheol-
dc.contributor.nonIdAuthorGil, JoonHo-
dc.contributor.nonIdAuthorHan, kwangseok-
dc.type.journalArticleArticle-
dc.subject.keywordPlusRF-ICS-
dc.subject.keywordPlusOPTIMIZATION-
dc.subject.keywordPlusINDUCTORS-
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