2D DWT VLSI architecture for wavelet image processing
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Paek, SK | ko |
| dc.contributor.author | Kim, Lee-Sup | ko |
| dc.date.accessioned | 2013-03-03T02:40:06Z | - |
| dc.date.available | 2013-03-03T02:40:06Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1998-03 | - |
| dc.identifier.citation | ELECTRONICS LETTERS, v.34, no.6, pp.537 - 538 | - |
| dc.identifier.issn | 0013-5194 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/76796 | - |
| dc.description.abstract | A cost-effective VLSI architecture with separate data-paths and their corresponding filter structure is proposed for performing a two-dimensional discrete wavelet transform (2D DWT). Compared with the conventional 2D DWT VLSI architectures, the proposed semi-recursive 2D DWT VLSI architecture has minimum hardware cost, and optimised data-bus utilisation, scheduling control overhead and storage size. | - |
| dc.language | English | - |
| dc.publisher | IEE-INST ELEC ENG | - |
| dc.subject | TRANSFORM | - |
| dc.title | 2D DWT VLSI architecture for wavelet image processing | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000072967600025 | - |
| dc.identifier.scopusid | 2-s2.0-0032028703 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 34 | - |
| dc.citation.issue | 6 | - |
| dc.citation.beginningpage | 537 | - |
| dc.citation.endingpage | 538 | - |
| dc.citation.publicationname | ELECTRONICS LETTERS | - |
| dc.identifier.doi | 10.1049/el:19980387 | - |
| dc.contributor.localauthor | Kim, Lee-Sup | - |
| dc.contributor.nonIdAuthor | Paek, SK | - |
| dc.type.journalArticle | Article | - |
| dc.subject.keywordPlus | TRANSFORM | - |
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