DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kwon, YS | ko |
dc.contributor.author | Park, In-Cheol | ko |
dc.contributor.author | Kyung, Chong-Min | ko |
dc.date.accessioned | 2013-03-02T22:27:54Z | - |
dc.date.available | 2013-03-02T22:27:54Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1999-11 | - |
dc.identifier.citation | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E82A, no.11, pp.2521 - 2526 | - |
dc.identifier.issn | 0916-8508 | - |
dc.identifier.uri | http://hdl.handle.net/10203/75882 | - |
dc.description.abstract | A new hip-hop configuration for half-swing clocking is proposed to save total clocking power. In the proposed scheme, only NMOS's are clocked with the half-swing clock in order to make it operate without level converters or any additional logics which were used in the earlier half-swing clocking schemes. V-cc is supplied to the random logic circuits and flip-flops while V-cc/2 is supplied to the clock network and some parts of the Aip-flop to reduce the power consumed in the clock network. Compared to the conventional scheme, the proposed flip-flop configuration can save the clocking power by 40%. | - |
dc.language | English | - |
dc.publisher | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG | - |
dc.subject | CMOS | - |
dc.subject | LOGIC | - |
dc.title | A new single-clock flip-flop for half-swing clocking | - |
dc.type | Article | - |
dc.identifier.wosid | 000083916200026 | - |
dc.identifier.scopusid | 2-s2.0-0005946626 | - |
dc.type.rims | ART | - |
dc.citation.volume | E82A | - |
dc.citation.issue | 11 | - |
dc.citation.beginningpage | 2521 | - |
dc.citation.endingpage | 2526 | - |
dc.citation.publicationname | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES | - |
dc.contributor.localauthor | Park, In-Cheol | - |
dc.contributor.localauthor | Kyung, Chong-Min | - |
dc.contributor.nonIdAuthor | Kwon, YS | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | low-power circuit | - |
dc.subject.keywordAuthor | clocking power | - |
dc.subject.keywordAuthor | half-swing clocking | - |
dc.subject.keywordPlus | CMOS | - |
dc.subject.keywordPlus | LOGIC | - |
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