DIVA: Dual-issue VLIW architecture with media instructions for image processing

Abstract

According to the demand on enormous multimedia data processing, we have designed a VLIW (Very Long Instruction Word) processor called DIVA (Dual-Issue VLIW Architecture) exploiting the ILP (instruction-level parallelism) in multimedia programs. DIVA processor which can execute two instructions in one cycle supports 86 instructions including 30 media instructions, and has a sub-word execution structure that supports the saturation mode arithmetic for image processing. Compared to scalar architectures without media instructions, the performance of the DIVA processor is improved by 2.2 to 5 times due to the combination of VLIW architecture and media instructions. DIVA processor, consisting of about 90,000 gates, was implemented using 0.6 mu m CMOS SOG (Sea-of-Gate) process on 8 mm X smm die, and has shown a performance of 80 MOPS (Million Operations Per Second) at 10 MHz clock frequency.