DETERMINATION OF EFFECTIVE BURN-IN TIME FOR PRINTED BOARD ASSEMBLY

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dc.contributor.authorKOH, JSko
dc.contributor.authorKIM, CHko
dc.contributor.authorPARK, JIko
dc.contributor.authorYum, Bong-Jinko
dc.date.accessioned2013-03-02T13:11:57Z-
dc.date.available2013-03-02T13:11:57Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1995-06-
dc.identifier.citationMICROELECTRONICS RELIABILITY, v.35, no.6, pp.893 - 902-
dc.identifier.issn0026-2714-
dc.identifier.urihttp://hdl.handle.net/10203/73667-
dc.description.abstractBurn-in is an effective means for screening out defects that contribute to infant mortality failures. Various studies have been conducted for determining: the optimum hum-in time for a device. However, most of them assume cost models, which are difficult to quantify. In this article, we take a more realistic approach for determining the effective brim-in time for a PBA(Printed Board Assembly) to satisfy the customer requirement that the failure rate after burr-in be less than a specified value. The proposed method is applied to two types of PBAs used in a certain electronic switching system.-
dc.languageEnglish-
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD-
dc.titleDETERMINATION OF EFFECTIVE BURN-IN TIME FOR PRINTED BOARD ASSEMBLY-
dc.typeArticle-
dc.identifier.wosidA1995QT55800003-
dc.identifier.scopusid2-s2.0-0029327582-
dc.type.rimsART-
dc.citation.volume35-
dc.citation.issue6-
dc.citation.beginningpage893-
dc.citation.endingpage902-
dc.citation.publicationnameMICROELECTRONICS RELIABILITY-
dc.contributor.localauthorYum, Bong-Jin-
dc.contributor.nonIdAuthorKOH, JS-
dc.contributor.nonIdAuthorKIM, CH-
dc.contributor.nonIdAuthorPARK, JI-
dc.type.journalArticleArticle-
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