Multilevel logic operation
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | jin-up kim | ko |
| dc.contributor.author | Kim, Jae Kyoon | ko |
| dc.date.accessioned | 2013-02-28T02:17:53Z | - |
| dc.date.available | 2013-02-28T02:17:53Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1995-09 | - |
| dc.identifier.citation | ELECTRONICS LETTERS, v.31, no.19, pp.1642 - 1643 | - |
| dc.identifier.issn | 0013-5194 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/72245 | - |
| dc.description.abstract | The multilevel logic operations (MLOs) that are extended from the conventional binary logic operations are defined. MLOs are useful for designing digital circuits based on binary logic. Application examples of multiple BPSK (binary phase shift keying) circuits are given to show the design efficiency of these MLOs. | - |
| dc.language | English | - |
| dc.publisher | Inst Engineering Technology-Iet | - |
| dc.title | Multilevel logic operation | - |
| dc.type | Article | - |
| dc.identifier.wosid | A1995RW64200018 | - |
| dc.identifier.scopusid | 2-s2.0-0029373006 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 31 | - |
| dc.citation.issue | 19 | - |
| dc.citation.beginningpage | 1642 | - |
| dc.citation.endingpage | 1643 | - |
| dc.citation.publicationname | ELECTRONICS LETTERS | - |
| dc.contributor.nonIdAuthor | jin-up kim | - |
| dc.type.journalArticle | Article | - |
| dc.subject.keywordAuthor | LOGIC CIRCUITS | - |
| dc.subject.keywordAuthor | MULTIVALUED LOGIC | - |
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