Radix-4 multiplier with regular layout structure

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dc.contributor.authorPark, Bko
dc.contributor.authorShin, Mko
dc.contributor.authorPark, In-Cheolko
dc.contributor.authorKyung, Chong-Minko
dc.date.accessioned2013-02-27T21:58:29Z-
dc.date.available2013-02-27T21:58:29Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1998-07-
dc.identifier.citationELECTRONICS LETTERS, v.34, no.15, pp.1446 - 1447-
dc.identifier.issn0013-5194-
dc.identifier.urihttp://hdl.handle.net/10203/71079-
dc.description.abstractA new parallel multiplier with a regular layout structure is described. To achieve a regular structure without sacrificing performance, a new circuit called the weighted carry save adder is proposed, which enables the multiplier not only to have a very regular layout but also to have a smaller operating size at the final adding stage than that of conventional schemes.-
dc.languageEnglish-
dc.publisherIEE-INST ELEC ENG-
dc.titleRadix-4 multiplier with regular layout structure-
dc.typeArticle-
dc.identifier.wosid000075339500005-
dc.identifier.scopusid2-s2.0-11744327200-
dc.type.rimsART-
dc.citation.volume34-
dc.citation.issue15-
dc.citation.beginningpage1446-
dc.citation.endingpage1447-
dc.citation.publicationnameELECTRONICS LETTERS-
dc.identifier.doi10.1049/el:19981068-
dc.contributor.localauthorPark, In-Cheol-
dc.contributor.localauthorKyung, Chong-Min-
dc.contributor.nonIdAuthorPark, B-
dc.contributor.nonIdAuthorShin, M-
dc.type.journalArticleArticle-
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