Showing results 1 to 4 of 4
Power minimization for 2- and $3-V_{DD}$ digital circuits = 2중, 3중 전원이 공급되는 디지털 회로를 위한 전력 최소화link Ahn, Ki-Yong; 안기용; et al, 한국과학기술원, 2009 |
Power Minimization for Dual- and Triple-Supply Digital Circuits via Integer Linear Programming Kyung, Chong-Min; Ahn, Ki-Yong, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E92A, pp.2318 - 2325, 2009-09 |
Synthesis and verification of state machine description using automatic test vector generation = 테스트 벡터 자동 생성을 이용한 스테이트 머신 기술의 합성 및 검증link Ahn, Ki-Yong; 안기용; et al, 한국과학기술원, 2002 |
Verification of Transaction Level models with Simulation Accelerator Kyung, Chong-Min; Ahn, Ki-Yong; Woo, Yun-Sik; Lee, Jae-Gon, IFIP VLSI-SoC Conference, 2005 |
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