OPTIMAL PWM DESIGN FOR HIGH-POWER 3-LEVEL INVERTER THROUGH COMPARATIVE-STUDIES

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dc.contributor.authorLIU, HLko
dc.contributor.authorCho, Gyu-Hyeongko
dc.contributor.authorPARK, SSko
dc.date.accessioned2008-07-29T02:31:50Z-
dc.date.available2008-07-29T02:31:50Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1995-01-
dc.identifier.citationIEEE TRANSACTIONS ON POWER ELECTRONICS, v.10, no.1, pp.38 - 47-
dc.identifier.issn0885-8993-
dc.identifier.urihttp://hdl.handle.net/10203/6636-
dc.description.abstractComparative studies between harmonic elimination and optimal PWM strategies are given for high power three-level inverter feeding induction motor. An effective PWM map construction method based on Valid Region on Frequency Modulation Index Plane is suggested. Thereby, an optimal map including asynchronous space vector PWM, harmonic elimination and optimal PWM method is generated covering all of the low, middle and high modulation index regions. The PWM map was designed for 1 MVA rated general purpose GTO inverter and implemented with digital signal processor. Experimental results are presented for 10 KVA prototype.-
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleOPTIMAL PWM DESIGN FOR HIGH-POWER 3-LEVEL INVERTER THROUGH COMPARATIVE-STUDIES-
dc.typeArticle-
dc.identifier.wosidA1995QA94200006-
dc.identifier.scopusid2-s2.0-0029230281-
dc.type.rimsART-
dc.citation.volume10-
dc.citation.issue1-
dc.citation.beginningpage38-
dc.citation.endingpage47-
dc.citation.publicationnameIEEE TRANSACTIONS ON POWER ELECTRONICS-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorCho, Gyu-Hyeong-
dc.contributor.nonIdAuthorLIU, HL-
dc.contributor.nonIdAuthorPARK, SS-
dc.type.journalArticleArticle-
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