DDA를 이용한 하드웨어 보간기의 계산 효율향상에 관한연구

Abstract

The maximum feedrate generated from the hardware DDA is closely related to its calculation efficiency. The smaller interpolation span results in the lower calculation efficiency. This paper presents the method to improve the calculation efficiency for the smaller interpolation span. For the linear interpolation the higher calculation efficiency can be achieved by putting biggest value that the interpolation DDA can hold. for the circular interpolation, however, the scheme used for linear interpolation does not work since arbitrary change of value in the interpolation DDA changes the radius of the circle. The bit length of the hardware DDA is adjusted instead of adjusting the value in DDA, which results in the every same effect on calculation efficiency for the circular interpolation. The hardware circuit and supporting software are designed, and tested by two axis step motor driven milling machine. The experimental results show that the proposed method drastically increases the maximum feedrate even for the smaller interpolation span.