DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lim, Jong-Tae | ko |
dc.date.accessioned | 2013-02-25T15:17:45Z | - |
dc.date.available | 2013-02-25T15:17:45Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1991-05 | - |
dc.identifier.citation | ELECTRONICS LETTERS, v.27, no.10, pp.800 - 801 | - |
dc.identifier.issn | 0013-5194 | - |
dc.identifier.uri | http://hdl.handle.net/10203/63140 | - |
dc.description.abstract | It is generally recognised that time delays will cause closed loop systems to become unstable. The adverse effect on stability caused by time delays is presented. Bounds on time delays for the stabilisation of unstable closed loop systems are also derived. | - |
dc.language | English | - |
dc.publisher | IEE-INST ELEC ENG | - |
dc.subject | STABILITY | - |
dc.title | STABILIZATION OF CLOSED-LOOP SYSTEMS BY TIME DELAYS | - |
dc.type | Article | - |
dc.identifier.wosid | A1991FP26500009 | - |
dc.identifier.scopusid | 2-s2.0-0026420440 | - |
dc.type.rims | ART | - |
dc.citation.volume | 27 | - |
dc.citation.issue | 10 | - |
dc.citation.beginningpage | 800 | - |
dc.citation.endingpage | 801 | - |
dc.citation.publicationname | ELECTRONICS LETTERS | - |
dc.contributor.localauthor | Lim, Jong-Tae | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | CLOSED LOOP SYSTEMS | - |
dc.subject.keywordAuthor | STABILITY | - |
dc.subject.keywordPlus | STABILITY | - |
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