DC Field | Value | Language |
---|---|---|
dc.contributor.author | Nam, BG | ko |
dc.contributor.author | Kim, H | ko |
dc.contributor.author | Yoo, Hoi-Jun | ko |
dc.date.accessioned | 2008-07-22T01:29:37Z | - |
dc.date.available | 2008-07-22T01:29:37Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2008-04 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON COMPUTERS, v.57, pp.490 - 504 | - |
dc.identifier.issn | 0018-9340 | - |
dc.identifier.uri | http://hdl.handle.net/10203/6232 | - |
dc.description.abstract | A unified computation method of vector and elementary functions is proposed for handheld 3D graphics systems. It unifies vector operations like vector multiply, multiply-and-add, divide, divide-by-square-root, and dot product and elementary functions like trigonometric, inverse trigonometric, hyperbolic, inverse hyperbolic, power (x(y) with two variables), and logarithm to an arbitrary base into a single four-way arithmetic platform. A number system called the fixed-point hybrid number system (FXP-HNS), which combines the fixed-point number system (FXP) and the logarithmic number system (LNS), is proposed for the power and area-efficient unification. Power and area-efficient logarithmic and antilogarithmic conversion schemes are also proposed for the data conversions between fixed-point and logarithmic numbers in the FXP-HNS and achieve 0.41 percent and 0.08 percent maximum conversion errors, respectively. The unified arithmetic unit based on the proposed schemes is presented with less than 6.3 percent operation error. Its fully pipelined architecture achieves single-cycle throughput with maximum four-cycle latency for all of the supported operations. Comparison results show that the proposed arithmetic unit achieves 30 percent power and 10.9 percent area reductions and runs two times faster than the previous approach. | - |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | IEEE COMPUTER SOC | - |
dc.subject | VLSI IMPLEMENTATION | - |
dc.subject | CONVERTER | - |
dc.subject | PROCESSOR | - |
dc.title | Power and area-efficient unified computation of vector and elementary functions for handheld 3D graphics systems | - |
dc.type | Article | - |
dc.identifier.wosid | 000254044800006 | - |
dc.identifier.scopusid | 2-s2.0-40949089711 | - |
dc.type.rims | ART | - |
dc.citation.volume | 57 | - |
dc.citation.beginningpage | 490 | - |
dc.citation.endingpage | 504 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON COMPUTERS | - |
dc.identifier.doi | 10.1109/TC.2008.12 | - |
dc.contributor.localauthor | Yoo, Hoi-Jun | - |
dc.contributor.nonIdAuthor | Nam, BG | - |
dc.contributor.nonIdAuthor | Kim, H | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | computer arithmetic | - |
dc.subject.keywordAuthor | unified arithmetic unit | - |
dc.subject.keywordAuthor | vector operations | - |
dc.subject.keywordAuthor | elementary functions | - |
dc.subject.keywordAuthor | logarithmic number system | - |
dc.subject.keywordAuthor | 3D computer graphics | - |
dc.subject.keywordAuthor | handheld systems | - |
dc.subject.keywordPlus | VLSI IMPLEMENTATION | - |
dc.subject.keywordPlus | CONVERTER | - |
dc.subject.keywordPlus | PROCESSOR | - |
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