Results 1-10 of 21 (Search time: 0.013 seconds).
NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
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Multiproduct Lot Merging-Splitting Algorithms for Semiconductor Wafer Fabrication Bang, June-Young; Kim, Yeong-Dae; Choi, Seong-Woo, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.25, no.2, pp.200 - 210, 2012-05 | |
Scheduling Wafer Lots on Diffusion Machines in a Semiconductor Wafer Fabrication Facility Kim, Yeong-Dae; Joo, BJ; Choi, SY, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.23, pp.246 - 254, 2010-05 | |
Scheduling healthcare services in a home healthcare system An, Y-J; Kim, Yeong-Dae; Jeong, B. J.; Kim, S-D, JOURNAL OF THE OPERATIONAL RESEARCH SOCIETY, v.63, no.11, pp.1589 - 1599, 2012-11 | |
A branch-and-bound algorithm for a two-machine flowshop scheduling problem with limited waiting time constraints Joo, Byung Jun; Kim, Yeong-Dae, JOURNAL OF THE OPERATIONAL RESEARCH SOCIETY, v.60, pp.572 - 582, 2009-04 | |
Hierarchical Production Planning for Semiconductor Wafer Fabrication Based on Linear Programming and Discrete-Event Simulation Bang, JY; Kim, Yeong-Dae, IEEE TRANSACTIONS ON AUTOMATION SCIENCE AND ENGINEERING, v.7, pp.326 - 336, 2010-04 | |
Scheduling Algorithms for Minimizing Tardiness of Orders at the Burn-in Workstation in a Semiconductor Manufacturing System Kim, Yeong-Dae; Kang, Jae-Hun; Lee, Gyeong-Eun; Lim, Seung-Kil, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.24, no.1, pp.14 - 26, 2011-02 | |
Scheduling on parallel identical machines to minimize total tardiness Shim, SO; Kim, Yeong-Dae, EUROPEAN JOURNAL OF OPERATIONAL RESEARCH, v.177, pp.135 - 146, 2007-02 | |
Minimizing makespan on a two-machine re-entrant flowshop Choi, SW; Kim, Yeong-Dae, JOURNAL OF THE OPERATIONAL RESEARCH SOCIETY, v.58, pp.972 - 981, 2007-07 | |
Due-date based scheduling and control policies in a multiproduct semiconductor wafer fabrication facility Kim, Yeong-Dae; Kim, JU; Lim, SK; Jun, HB, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.11, no.1, pp.155 - 164, 1998-02 | |
A due-date-based algorithm for lot-order assignment in a semiconductor wafer fabrication facility Kim, Yeong-Dae; Bang, JY; An, KY; Lim, SK, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.21, pp.209 - 216, 2008-05 |
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