A Two-Dimensional Model for the Excess Interstitial Distribution in Silicon During Thermal Oxidation

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dc.contributor.authorY.S.Shinko
dc.contributor.authorKim, Choong Kiko
dc.date.accessioned2013-02-25T08:08:53Z-
dc.date.available2013-02-25T08:08:53Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1984-06-
dc.identifier.citationIEEE TRANSACTIONS ON ELECTRON DEVICES, v.31, no.6, pp.797 - 800-
dc.identifier.issn0018-9383-
dc.identifier.urihttp://hdl.handle.net/10203/60720-
dc.languageEnglish-
dc.publisherIEEE-Inst Electrical Electronics Engineers Inc-
dc.titleA Two-Dimensional Model for the Excess Interstitial Distribution in Silicon During Thermal Oxidation-
dc.typeArticle-
dc.identifier.wosidA1984SS50400010-
dc.identifier.scopusid2-s2.0-0021437279-
dc.type.rimsART-
dc.citation.volume31-
dc.citation.issue6-
dc.citation.beginningpage797-
dc.citation.endingpage800-
dc.citation.publicationnameIEEE TRANSACTIONS ON ELECTRON DEVICES-
dc.contributor.nonIdAuthorY.S.Shin-
dc.type.journalArticleArticle-
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