Delay Switching PLL의 Pull-in 특성Pull-in Characteristics of Delay Switching Phase-Locked Loop
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 장병화 | ko |
| dc.contributor.author | 김재균 | ko |
| dc.date.accessioned | 2013-02-25T05:47:06Z | - |
| dc.date.available | 2013-02-25T05:47:06Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1978-10 | - |
| dc.identifier.citation | 전자공학회지, v.15, no.5, pp.13 - 18 | - |
| dc.identifier.issn | 1975-2377 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/60363 | - |
| dc.language | Korean | - |
| dc.publisher | 대한전자공학회 | - |
| dc.title | Delay Switching PLL의 Pull-in 특성 | - |
| dc.title.alternative | Pull-in Characteristics of Delay Switching Phase-Locked Loop | - |
| dc.type | Article | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 15 | - |
| dc.citation.issue | 5 | - |
| dc.citation.beginningpage | 13 | - |
| dc.citation.endingpage | 18 | - |
| dc.citation.publicationname | 전자공학회지 | - |
| dc.contributor.nonIdAuthor | 장병화 | - |
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