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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

Implementation of low jitter clock distribution using chip-package hybrid interconnection

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Ryu, C. / Chung, D. / Bae, K. / Yu, J. / Kim, Jounghoresearcher
Publisher
IEEE
Issue Date
2004-10-25
Language
English
Citation

IEEE 13th Topical Meeting on Electrical Performance of Electronic Packaging, pp.291 - 294

URI
http://hdl.handle.net/10203/588
Appears in Collection
EE-Conference Papers(학술회의논문)
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