Test Pattern Generation for the Functional Test of Logic Networks논리회로 기능검사를 위한 입력신호 산출
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | hong, w.m. | ko |
| dc.contributor.author | Cho, Jung Wan | ko |
| dc.date.accessioned | 2013-02-24T09:17:16Z | - |
| dc.date.available | 2013-02-24T09:17:16Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1976-07 | - |
| dc.identifier.citation | JOURNAL OF KIEE, v.13, no.3, pp.1 - 6 | - |
| dc.identifier.issn | 1013-0780 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/56013 | - |
| dc.language | English | - |
| dc.publisher | The Korean Institute of Electrical Engineers | - |
| dc.title | Test Pattern Generation for the Functional Test of Logic Networks | - |
| dc.title.alternative | 논리회로 기능검사를 위한 입력신호 산출 | - |
| dc.type | Article | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 13 | - |
| dc.citation.issue | 3 | - |
| dc.citation.beginningpage | 1 | - |
| dc.citation.endingpage | 6 | - |
| dc.citation.publicationname | JOURNAL OF KIEE | - |
| dc.contributor.nonIdAuthor | hong, w.m. | - |
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